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WIRE 1392 1616 1280 1616 WIRE 1488 1616 1392 1616 WIRE 608 1680 608 1616 FLAG 208 752 0 FLAG 608 1680 0 FLAG 496 576 V_supply FLAG 1616 1328 Cres FLAG 592 1168 bridge_left FLAG 1072 1168 Lres FLAG -608 1104 0 FLAG -784 688 0 FLAG -688 576 5V FLAG -448 752 2 FLAG -448 1008 3 FLAG 464 832 upper_gate FLAG 464 1440 lower_gate FLAG 1344 1232 bridge_right FLAG 80 768 4 FLAG 80 1024 5 FLAG -272 928 0 FLAG -288 1216 0 FLAG -1648 976 0 FLAG -1536 1040 0 FLAG -1360 1040 0 FLAG -1504 768 0 FLAG -1776 1088 0 FLAG -1328 768 osc_drain FLAG -1328 912 osc_source FLAG -1488 832 osc_gate FLAG -1952 1088 0 FLAG -2208 1088 0 FLAG -1984 768 varactor_volts FLAG -2464 1088 0 FLAG -2464 784 mic_output FLAG -2272 784 mic_out_plus_dc FLAG -624 848 0 FLAG -1136 768 0 FLAG -1056 848 0 FLAG -992 752 comp_V SYMBOL sw 528 992 M180 WINDOW 3 -8 118 Left 2 SYMATTR Value Sw_kw1 SYMATTR InstName S1 SYMBOL sw 528 1600 M180 WINDOW 3 -22 120 Left 2 SYMATTR Value Sw_kw1 SYMATTR InstName S2 SYMBOL bv 288 896 R0 SYMATTR InstName B8 SYMATTR Value V=2*V(4) SYMBOL bv 304 1488 R0 SYMATTR InstName B9 SYMATTR Value V=2*V(5) SYMBOL res 448 864 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R3 SYMATTR Value 2R2 SYMBOL res 464 1456 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R4 SYMATTR Value 2R2 SYMBOL voltage 208 592 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V6 SYMATTR Value PULSE(0 48 1u 10u 1 10 20) SYMBOL res 400 560 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R11 SYMATTR Value 1m SYMBOL res 512 752 R0 SYMATTR InstName RS1 SYMATTR Value 1m SYMBOL res 512 1344 R0 SYMATTR InstName RS2 SYMATTR Value 1m SYMBOL res 816 1152 M90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName Rpri_sense SYMATTR Value 1m SYMBOL ind 704 1152 M90 WINDOW 0 5 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName L_res SYMATTR Value 5µ SYMATTR SpiceLine Rser=1m SYMBOL cap 816 1472 R0 SYMATTR InstName C6 SYMATTR Value 100p SYMBOL res 816 1328 R0 SYMATTR InstName R15 SYMATTR Value 1R SYMBOL diode 720 976 R180 WINDOW 0 24 64 Left 2 WINDOW 3 -35 0 Left 2 SYMATTR InstName D3 SYMATTR Value pwr_diode SYMBOL diode 672 1552 R180 WINDOW 0 24 64 Left 2 WINDOW 3 -35 0 Left 2 SYMATTR InstName D5 SYMATTR Value pwr_diode SYMBOL cap 720 1424 R0 SYMATTR InstName C_bridge_1 SYMATTR Value 1f SYMBOL cap 1376 752 R0 SYMATTR InstName C1 SYMATTR Value 470µ SYMBOL cap 1376 1360 R0 SYMATTR InstName C2 SYMATTR Value 470µ SYMBOL res 1264 720 R0 SYMATTR InstName R7 SYMATTR Value 100k SYMBOL res 1264 1344 R0 SYMATTR InstName R8 SYMATTR Value 100k SYMBOL res 1376 848 R0 SYMATTR InstName R10 SYMATTR Value 1m SYMBOL res 1376 1440 R0 SYMATTR InstName R19 SYMATTR Value 1m SYMBOL res 1616 1152 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R_load SYMATTR Value 5R SYMBOL cap 1536 1312 R90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName C_res SYMATTR Value 1.5n SYMBOL Comparators\\LT1719 -608 688 R0 SYMATTR InstName U1 SYMBOL Comparators\\LT1719 -608 944 R0 SYMATTR InstName U2 SYMBOL voltage -784 576 R0 SYMATTR InstName V1 SYMATTR Value 5V SYMBOL bv -352 768 R0 WINDOW 3 -104 102 Left 2 SYMATTR Value V=delay(V(2), 15ns) SYMATTR InstName B1 SYMBOL bv -352 1040 R0 WINDOW 3 -110 123 Left 2 SYMATTR Value V=delay(V(3), 15ns) SYMATTR InstName B2 SYMBOL Digital\\and -160 720 R0 WINDOW 3 -96 17 Left 2 SYMATTR Value Vhigh=5 SYMATTR InstName A1 SYMBOL Digital\\and -160 976 R0 WINDOW 3 -104 7 Left 2 SYMATTR Value Vhigh=5 SYMATTR InstName A3 SYMBOL NJF -1408 768 R0 SYMATTR InstName Q1 SYMATTR Value 2N5484 SYMBOL RES -1376 656 R0 SYMATTR InstName R1 SYMATTR Value 1k SYMBOL res -1376 928 R0 SYMATTR InstName R2 SYMATTR Value 2k SYMBOL ind -1632 960 R180 WINDOW 0 3 79 Right 2 WINDOW 3 1 40 Right 2 SYMATTR InstName L1 SYMATTR Value 100µ SYMBOL cap -1552 848 R0 SYMATTR InstName C3 SYMATTR Value 130p SYMBOL cap -1552 944 R0 SYMATTR InstName C4 SYMATTR Value 130p SYMBOL cap -1392 912 R90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName C5 SYMATTR Value 60p SYMBOL VOLTAGE -1504 656 R0 SYMATTR InstName V3 SYMATTR Value 7. SYMBOL diode -1792 1008 M180 WINDOW 0 24 72 Left 2 WINDOW 3 24 0 Left 2 SYMATTR InstName D1 SYMATTR Value 1N4148 SYMBOL varactor -1936 1056 R180 WINDOW 0 -62 63 Left 2 WINDOW 3 24 0 Left 2 SYMATTR InstName D2 SYMATTR Value KV1471 SYMBOL cap -1824 816 R90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName C7 SYMATTR Value 1.5n SYMBOL voltage -2208 960 R0 WINDOW 0 -125 10 Left 2 SYMATTR InstName V4 SYMATTR Value 3.3V SYMBOL res -2032 816 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R5 SYMATTR Value 100k SYMBOL voltage -2464 960 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 WINDOW 3 -83 105 Left 2 SYMATTR Value SINE(0 0.100 1k) SYMATTR InstName V5 SYMBOL cap -2304 816 R90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName C8 SYMATTR Value 100n SYMBOL res -2480 848 R0 SYMATTR InstName R6 SYMATTR Value 600R SYMBOL res -2224 848 R0 SYMATTR InstName R9 SYMATTR Value 33k SYMBOL RES -1072 544 R0 SYMATTR InstName R13 SYMATTR Value 1k SYMBOL NJF -1104 640 R0 SYMATTR InstName Q2 SYMATTR Value 2N5484 SYMBOL res -1072 752 R0 SYMATTR InstName R14 SYMATTR Value 2k TEXT -1432 1392 Left 2 !.model pwr_diode D(Ron=1m Roff=1Meg Vfwd=.4) TEXT -1432 1456 Left 2 !.model Sw_kw1 SW(Ron=.01 Roff=100Meg Vt=4 Vh=-1) TEXT -2552 -200 Left 2 ;class D power amp FM, 1.84Mhz\n \nI want this to be narrowband FM rather thn wideband FM.\nnarrowband FM is defined as peak deviation is less than max audio freq.\namateurs often set max audio freq = about 3khz, so I will set peak deviation = 2.5khz.\nif the peak deviation was greater than the 3khz max audio freq , then this would be called wideband FM.\n \nIn the control circuit, the comparators on the left generate pulses that drive the high and low FETs.\nthere is then a circuit block that cuts 15ns off these pulses.\nthis is to ensure that both FETs are not on at once, this would generate a very high current that could \ngenerate EMI and even destroy the FETs.\n \nThe power circuit FETs are implemented as ideal switches S1 and S2 here,\nas complex circuits can have simulation issues\nthis circuit is open loop, that is it doesn't feed the output voltage back to the control circuit.\nthe power circuit components L_res and C_res have been selected to resonate at the 1.84 Mhz that the circuit is driven at. TEXT 528 360 Left 4 ;Class D amplifier power circuit TEXT -368 -592 Left 4 ;Instructions, for class D amplifier TEXT -2544 -544 Left 5 ;Class D power Amp, set up as an FM amplifier. TEXT -728 440 Left 4 ;Class D amplifier control circuit. TEXT -376 560 Left 2 ;this circuit block is to \nshorten the drive pulses \nto stop "shoothrough"\nwhen both power switches \nare on at once. TEXT -368 -552 Left 2 ;click on run\nthis sim takes a while to run, \nyou need about 10ms of results to get settled load current waveform,\nand the full 50ms of results to take a good FFT of the load current.\nthen click on "4" to plot it, then click on "5" to plot it.\nzoom in so that you can see the individual pulses.\nthen click on the plot window then on plot settings / add plot pane\nthen click on "bridge_left" to plot it, then click on "bridge_right" to plot it.\nthen click on the plot window and plot settings/add plot pane\nthen click on "R_load" to plot its current,\nthen click on the plot window and plot settings/add plot pane\nthen hold the ALT key hover over R-Load and click, \nthis will plot the average power dissipated in it.\nclick on the plot window, then hold the cntrl key and click on the "V(Cres,Lres)*I(R_load)" title\nthis will bring up its average value (about 100W).\nallow nthe simulation to finish,\nclick on the plot window, then on view/FFT,\nin the window that opens specify a time rangs of 20ms to 50ms,\nand click on I(R_load), then okay.\nin the graph that opens zoom to the 1.84 Mhz peak. TEXT -2536 -296 Left 4 ;Circuit description. TEXT -2536 -488 Left 3 ;The power circuit components L_res and C_res have been selected to resonate at the 1.84 Mhz that the circuit is driven at.\nHence this circuit is only designed for one band.\nfor a different band you would want different values of L_res and C_res, in fact you would want a complete new circuit to avoid the \nparasitics associated with switches. TEXT -2224 416 Left 4 ;FM signal source (1.84Mhz Colpits oscillator) TEXT -1440 1320 Left 2 !.tran 0 51m 1m 5n startup TEXT -1432 1352 Left 2 !.options method=trap TEXT -2016 616 Left 2 ;Varactor diode is\nKV1471\n35pF at 1V\n6.5pf at 5V TEXT -2624 1000 Left 2 ;mic output \nof 100mV TEXT -2608 880 Left 2 ;typical mic\noutput Z TEXT -368 40 Left 4 ;instructions, for plotting Colpits osc waveforms TEXT -368 80 Left 2 ;don't need to click on run as you have already "run" for the class D Amp\nthen click on "mic_out_plus_dc" to plot it.\nthen click on the plot window then on plot settings / add plot pane\nthen click on "varactor_volts" to plot it\nthen click on the plot window and plot settings/add plot pane\nthen click on "source" to plot it\nthen click on the plot window,\nthen click on View/FFT\nthen click on V(source) in the window that opens,\nthis will plot its FFT, zoom to around 1Mhz in the FFT graph TEXT -1184 480 Left 2 ;this cct sets the \ncomparison voltage \nfor the comparators TEXT -2368 1560 Left 2 ;You may republish or reuse this circuit implementation and text providing this line and the following lines are included.\nThis circuit implementation designed by Keith Wallbanks. Originally released on analogsimulation.co.uk\nThis circuit is provided as is without warranty of any kind. This text is intended to implement the MIT licence. RECTANGLE Normal 0 1280 -432 544 2 RECTANGLE Normal 48 1296 -848 464 2 RECTANGLE Normal 1712 1712 144 464 2 RECTANGLE Normal -912 1296 -2640 448 2 RECTANGLE Normal -928 880 -1200 464 2