Version 4.1 SHEET 1 3696 680 WIRE -96 -320 -128 -320 WIRE 32 -320 -16 -320 WIRE 32 -304 32 -320 WIRE -128 -224 -128 -320 WIRE -128 -112 -128 -224 WIRE -352 -64 -400 -64 WIRE -208 -64 -352 -64 WIRE 32 -64 32 -224 WIRE 32 -64 -112 -64 WIRE 96 -64 32 -64 WIRE 112 -64 96 -64 WIRE 192 -64 112 -64 WIRE 320 -64 272 -64 WIRE 384 -64 320 -64 WIRE 432 -64 384 -64 WIRE -400 0 -400 -64 WIRE 320 0 320 -64 WIRE 432 0 432 -64 WIRE 96 48 96 -64 WIRE -400 176 -400 80 WIRE 96 176 96 112 WIRE 96 176 -400 176 WIRE 320 176 320 64 WIRE 320 176 96 176 WIRE 432 176 432 80 WIRE 432 176 320 176 WIRE -400 224 -400 176 FLAG -400 224 0 FLAG -128 -224 V_gate FLAG 112 -64 V_diode FLAG 384 -64 V_out FLAG -352 -64 V_in SYMBOL ind 176 -80 M90 WINDOW 0 5 56 VBottom 2 WINDOW 3 50 51 VTop 2 SYMATTR InstName L1 SYMATTR Value 100µ SYMATTR SpiceLine Rser=1m SYMBOL nmos -208 -112 M90 WINDOW 3 56 72 Invisible 2 SYMATTR Value BSC600N25NS3 SYMATTR InstName M1 SYMBOL diode 80 112 M180 WINDOW 0 24 64 Left 2 WINDOW 3 24 0 Left 2 SYMATTR InstName D1 SYMBOL cap 304 0 R0 SYMATTR InstName C1 SYMATTR Value 100µ SYMBOL res 416 -16 R0 SYMATTR InstName R_Load SYMATTR Value 10R SYMBOL voltage -400 -16 R0 SYMATTR InstName V_in SYMATTR Value 100V SYMBOL voltage 32 -320 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 WINDOW 3 -97 119 Left 2 SYMATTR Value PULSE(0 10 0 10n 10n 5u 10u) SYMATTR InstName V_control SYMBOL res 0 -336 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R1 SYMATTR Value 2R TEXT -24 -976 Left 5 ;The Buck SMPS topology. TEXT -432 376 Left 2 !.tran 0 2m 1m TEXT 760 -88 Left 3 ;Using the buck in its simplest form. TEXT 768 -40 Left 2 ;In its simplest form, a bit like this circuit here, the buck is used to replace a linear regulator...\nexcept typically you would add a control loop to give an accurate output Voltage,\nand synchronous rectification for better efficiency. TEXT 760 56 Left 3 ;The rest of the buck family of circuits (there are lots of them) TEXT 768 112 Left 2 ;I would call any circuit where the output Voltage = D x the input Voltage a buck topology,\nwell the boost and the flyback topologies have different formulas for Vout/Vin.\nThis means that loads of SMPS circuit topologies are part of the family of buck topologies.\nThis includes..\nthe halfbridge, the fullbridge (sometimes called the H bridge), the forward, the push pull, \nseveral motor drive SMPS circuits, etc... TEXT -400 -760 Left 4 ;Instructions TEXT -512 -712 Left 2 ;click on run\nthen click on "V_in" to plot its Voltage\nthen click on "V_diode" to plot its Voltage\nZoom the time axis so you can see the individual cycles\nthen click on "V_out" to plot its Voltage\nclick on the plot window, then on plot settings/add plot pane.\nthen click on "V_gate" and hold the mouse key down, drag the mouse across to "V_diode" and release,\nthis should plot "V_gate"-"V_diode",\nthis is the voltage we are using to turn the FET on and off.\nclick on the plot window, then on plot settings/add plot pane.\nthen click on "L1" to plot its current TEXT 736 -144 Left 4 ;Uses of the buck SMPS topology. TEXT 728 -488 Left 2 ;At the start of a cycle, the FET is turned on so the circuit applies the input voltage \nto the node "V_diode" \nthis builds the inductor current up,\nthe FET is then turned off, so the inductor current then switches to the diode,\nthis makes the voltage at node "V_diode", zero minus a diode drop. \nso we have a square wave voltage here alternating between Vin and (zero minus a diode drop0, \nthe inductor and capacitor then form the output filter to average this square wave into a DC voltage. TEXT 736 -536 Left 4 ;A bit more detail. TEXT 720 -264 Left 2 ;The simple circuit description is based on a circuit with continuous inductor current, \nfor discontinuous inductor current see the accompanying text file. TEXT 736 -720 Left 2 ;This simulation is the Buck SMPS topology in its simplest form with no control loop, \nno synchronous rectification, and no input output isolation, its too simple to be a practical \ncircuit, but I have deliberately kept things simple in order to explain the basic topology.\nsome folk would say that the buck topology is just the FET, the diode, and the inductor,\nbut you realy need the rest of the circuit here to show it working. TEXT -96 -904 Left 4 ;Start off with the "Instructions" section to plot some waveforms, \nThen the rest of the text might make more sense. TEXT 768 296 Left 1 ;You may republish or reuse this circuit implementation and text providing this line and the following lines are included.\nThis circuit implementation designed by Keith Wallbanks. Originally released on analogsimulation.co.uk\nThis circuit is provided as is without warranty of any kind. This text is intended to implement the MIT licence.